6 ms·

> What's next, calling each bit in a SIMT lane a "core"? No, because that would break the convention they've used since the introduction of the term CUDA core:

by TomVDB 6y ago

> What's next, calling each bit in a SIMT lane a "core"? No, because that would break the convention they've used since the introduction of the term CUDA core: it's the number of FP32 multiply-accumulate instances in the shader cores. Nothing more, nothing less. If you see more into it, then that's on you. You may not like that they define core this way (all other GPU vendors do it the same way, of course), but they've never used a different definition. BTW, I checked the 8800 GTX review and there's no trace of 'core' being used in that way. It was AMD who started calling FP32 ALUs 'shader cores' or 'shaders' with the introduction of the ill fated 2900 XT. Since comparing the number of same-function resources is one of the favorite hobbies of GPU buyers, Nvidia subsequently started using the same counting method and came up with the terms "CUDA core."

pixelpoet 6y ago
> they've never used a different definition The term "core" had a concrete meaning before Nvidia defined it to mean number of FMA units, and it's obviously no accident: they get to claim they have 32x more cores than would be the case by common definition. They are the odd one out; should Intel and AMD start multiplying their number of cores by the SIMD width? You would accept that as a "core"? Now, as I wrote above, they have changed it AGAIN: they are now double-counting each "core" because it has some (limited) superscalar capability.
- TomVDB 6y ago
  > The term "core" had a concrete meaning before Nvidia defined it to mean number of FMA units It was AMD/ATI who started doing it. Nvidia followed, and they didn't really have a choice if they wanted to avoid an "AMD has 320 shader cores yet Nvidia only has 16" marketing nightmare. > Now, as I wrote above, they have changed it AGAIN: they are now double-counting each "core" because it has some (limited) superscalar capability. They did not. In Turing, there's one FP32 and one INT32 pipeline with dual issue, in Ampere, there's one FP32 and one (INT32+FP32) pipeline, allowing dual issue of 2 FP32 and INT32 is not being used. That can only be done if there are 2 physical FP32 instances. There is no double counting. If your point is that this second FP32 unit can't always be used at 100%, e.g. because the INT32 is used, then see my initial comment: it's the number of physical instances, nothing more, nothing less. It doesn't say anything about their occupancy. The same was obviously always the case for AMD as well, since they had a VLIW5 ISA when they introduced the term, and I'm pretty sure that those were not always fully occupied either.
  - pixelpoet 6y ago
    > If your point is that this second FP32 unit can't always be used at 100% My point is that the second FP32 unit is not a core, in the sense of https://www.amazon.com/Computer-Architecture-Quantitative-John-Hennessy/dp/012383872X https://www.amazon.com/Computer-Architecture-Quantitative-Jo... which, it is my understanding, was a well-established standard; nothing more, nothing less.
    - TomVDB 6y ago
      Is that it? According to that definition, the first FP32 unit is not a core either... But, again, if you want to blame someone for this terrible, terrible marketing travesty, start with AMD. They started it all... My point was simply been that, contrary to your assertion, Nvidia and AMD have never changed the definition of what they consider to be a core, even if that definition doesn't adhere to computer science dogma.
    - ksec 6y ago
      Well Cloud Vendor also use the term "Core" when they meant a CPU thread. With SMT8 you now get 8 CPU Core. per Actual Core. I would love people to backlash on that too. Unfortunately the ship has sailed.
      - wmf 6y ago
        I think at this point it's just Azure using "vCores" and everybody else has migrated to less dishonest terminology.
        ksec 6y ago
        Yes they used to be vCore ( But you will be surprised how many developers and industry expert didn't know it was a thread ) They then dropped the vCore, so it is now simply Core.
        wmf 6y ago
        I can't find any cloud providers using the term "core". Azure is using "vCore" and the others are using "vCPU".
bayindirh 6y ago
> It was AMD who started calling FP32 ALUs 'shader cores' or 'shaders' with the introduction of the ill fated 2900 XT IIRC, ATI started to use proper FP32 ALUs for both pixel shading and video processing/acceleration [0] around the same time. I guess doing this stuff needs more than simple MUL/ACC instructions. So, there's no misdirection here. [0]: https://en.wikipedia.org/wiki/Video_Shader https://en.wikipedia.org/wiki/Video_Shader
- TomVDB 6y ago
  Yes. If you're a computer science fundamentalist like pixelpoet who wants to stick to definition of core as what's AMD and Nvidia call "CU" and "SM", using "threads and warps" instead of "strands and theads", then "CUDA core" is obviously jarring. It's simply a case where marketing won. At least Nvidia and AMD, and now Intel, are using the same term. You can go on with your live, or you can whine about it, but it's not going to change.
  - bayindirh 6y ago
    If we're going to stick to literal definitions of the things in computer science, we should get the forks out and march to the sotrage manufacturers' HQs to force them to accept 1kB is actually 1024 bytes, not 1000. From my PoV, any functionally complete computational unit (in the context of the device) can be called a core. Should we say that GPUs has no core because they don't support 3D Now! or SSE or AES instructions? Consider an FPGA. I can program it to have many small cores which can do a small set of operations or I can program it to be single but more capable core. Which one is a real core then?
    - paulmd 6y ago
      a CU is not a computationally complete unit, it has no independent thread of execution, all cores in a warp follow the same execution path (indeed all execution paths, even if not applicable to that CU). That is in contrast to your FPGA example. Either one big core or many small cores can all execute their own threads. It's not that simple either, you've got stuff like SMT and CMT where you have multiple threads executing on a single set of execution resources - but CUs are clearly on the line of "not a self-contained core".

by TomVDB 6y ago

pixelpoet 6y ago

> they've never used a different definition The term "core" had a concrete meaning before Nvidia defined it to mean number of FMA units, and it's obviously no accident: they get to claim they have 32x more cores than would be the case by common definition. They are the odd one out; should Intel and AMD start multiplying their number of cores by the SIMD width? You would accept that as a "core"? Now, as I wrote above, they have changed it AGAIN: they are now double-counting each "core" because it has some (limited) superscalar capability.

TomVDB 6y ago
> The term "core" had a concrete meaning before Nvidia defined it to mean number of FMA units It was AMD/ATI who started doing it. Nvidia followed, and they didn't really have a choice if they wanted to avoid an "AMD has 320 shader cores yet Nvidia only has 16" marketing nightmare. > Now, as I wrote above, they have changed it AGAIN: they are now double-counting each "core" because it has some (limited) superscalar capability. They did not. In Turing, there's one FP32 and one INT32 pipeline with dual issue, in Ampere, there's one FP32 and one (INT32+FP32) pipeline, allowing dual issue of 2 FP32 and INT32 is not being used. That can only be done if there are 2 physical FP32 instances. There is no double counting. If your point is that this second FP32 unit can't always be used at 100%, e.g. because the INT32 is used, then see my initial comment: it's the number of physical instances, nothing more, nothing less. It doesn't say anything about their occupancy. The same was obviously always the case for AMD as well, since they had a VLIW5 ISA when they introduced the term, and I'm pretty sure that those were not always fully occupied either.
- pixelpoet 6y ago
  > If your point is that this second FP32 unit can't always be used at 100% My point is that the second FP32 unit is not a core, in the sense of https://www.amazon.com/Computer-Architecture-Quantitative-John-Hennessy/dp/012383872X https://www.amazon.com/Computer-Architecture-Quantitative-Jo... which, it is my understanding, was a well-established standard; nothing more, nothing less.
  - TomVDB 6y ago
    Is that it? According to that definition, the first FP32 unit is not a core either... But, again, if you want to blame someone for this terrible, terrible marketing travesty, start with AMD. They started it all... My point was simply been that, contrary to your assertion, Nvidia and AMD have never changed the definition of what they consider to be a core, even if that definition doesn't adhere to computer science dogma.
  - ksec 6y ago
    Well Cloud Vendor also use the term "Core" when they meant a CPU thread. With SMT8 you now get 8 CPU Core. per Actual Core. I would love people to backlash on that too. Unfortunately the ship has sailed.
    - wmf 6y ago
      I think at this point it's just Azure using "vCores" and everybody else has migrated to less dishonest terminology.
      - ksec 6y ago
        Yes they used to be vCore ( But you will be surprised how many developers and industry expert didn't know it was a thread ) They then dropped the vCore, so it is now simply Core.
        wmf 6y ago
        I can't find any cloud providers using the term "core". Azure is using "vCore" and the others are using "vCPU".

bayindirh 6y ago

> It was AMD who started calling FP32 ALUs 'shader cores' or 'shaders' with the introduction of the ill fated 2900 XT IIRC, ATI started to use proper FP32 ALUs for both pixel shading and video processing/acceleration [0] around the same time. I guess doing this stuff needs more than simple MUL/ACC instructions. So, there's no misdirection here. [0]: https://en.wikipedia.org/wiki/Video_Shader https://en.wikipedia.org/wiki/Video_Shader

TomVDB 6y ago
Yes. If you're a computer science fundamentalist like pixelpoet who wants to stick to definition of core as what's AMD and Nvidia call "CU" and "SM", using "threads and warps" instead of "strands and theads", then "CUDA core" is obviously jarring. It's simply a case where marketing won. At least Nvidia and AMD, and now Intel, are using the same term. You can go on with your live, or you can whine about it, but it's not going to change.
- bayindirh 6y ago
  If we're going to stick to literal definitions of the things in computer science, we should get the forks out and march to the sotrage manufacturers' HQs to force them to accept 1kB is actually 1024 bytes, not 1000. From my PoV, any functionally complete computational unit (in the context of the device) can be called a core. Should we say that GPUs has no core because they don't support 3D Now! or SSE or AES instructions? Consider an FPGA. I can program it to have many small cores which can do a small set of operations or I can program it to be single but more capable core. Which one is a real core then?
  - paulmd 6y ago
    a CU is not a computationally complete unit, it has no independent thread of execution, all cores in a warp follow the same execution path (indeed all execution paths, even if not applicable to that CU). That is in contrast to your FPGA example. Either one big core or many small cores can all execute their own threads. It's not that simple either, you've got stuff like SMT and CMT where you have multiple threads executing on a single set of execution resources - but CUs are clearly on the line of "not a self-contained core".