Memory bandwidth is usually the bottleneck before PCIe. You see this effect in other things too, such as Intel NICs being able to place packets directly in L3

Memory bandwidth is usually the bottleneck before PCIe. You see this effect in other things too, such as Intel NICs being able to place packets directly in L3 cache because avoiding main memory is such a huge win (for both bandwidth and latency reasons): https://www.intel.com/content/www/us/en/io/data-direct-i-o-technology.html https://www.intel.com/content/www/us/en/io/data-direct-i-o-t...