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MIPS has excellent cores in the middle range (The "I class"). They can't compete at the high end with ARM, as high end need to be optimized for the latest proce
by yaantc 6y ago
MIPS has excellent cores in the middle range (The "I class"). They can't compete at the high end with ARM, as high end need to be optimized for the latest processes in close cooperation with the leading fabs (TSMC and Samsung) and this is very labor intensive and so costly. So in the CPU IP world, it's ARM area. They're not the best for the very small cores either.
But in the middle, like the I-7200 or I-6500, they have very good cores and related IPs (like a coherent LLC). From last time I looked, still much more mature than anything from RISC V suppliers for example. If the I-7200 used the RISC V ISA (with extensions), it would likely be a reference in its class. Instead MIPS went with a new compact ISA that nobody cares about, too bad. Of course, the RISC V suppliers will mature over time and will at some point offer competitive or better solutions. But right now, the quality of some MIPS IPs shouldn't be underestimated. It would be too bad if this were wasted, but unfortunately it could happen. Hopefully the IP and people behind it will be acquired and the know-how will end up in coming RISC V chips. One can hope...
- RantyDave 6y agoPresumably (as someone who doesn't really know shit about this) it's fully possible to make a MIPS chip that speaks Arm instructions? Instructions arrive and are decoded to uops, right? So is the instruction set itself software defined?