Deterministic latency. That usually means no cache, speculative execution, or anything else that can't guarantee it will complete in a reasonable time. Specifi

Deterministic latency. That usually means no cache, speculative execution, or anything else that can't guarantee it will complete in a reasonable time. Specifically, in many architectures interrupt handling code must be able to yield _very_ quickly in order to continue receiving interrupts (or use reentrant interrupts which are a whole other mess) and even a cache look up, which might fail and have to wait for DDR ram for hundreds or thousands of cycles, makes the system unable to guarantee that it will do what it needs to do in time, like respond to some safety shutoff switch. I think one of the things ARM did here is make a way for interrupt handling code to stay in cache permanently along with some other determinism guarantees.