Memory and I/O were separate spaces with separate pins and separate operations. The Nanoprocessor had 11 address lines for reading instructions from a 2K ROM. I

Memory and I/O were separate spaces with separate pins and separate operations. The Nanoprocessor had 11 address lines for reading instructions from a 2K ROM. It had 4 I/O device select lines for accessing 15 I/O devices. So if you added RAM (as in the real time clock), the RAM was accessed through I/O instructions. You'd write the address to one port and read the data through another port. It ended up looking a lot like microcode, with memory accesses split into two pieces.