3 ms·
Interesting, L1 caches are fast and even if compilers do register allocation they kinda rely on it being not-too-shitty so when spilling (and many compilers for
by whizzter 6y ago
Interesting, L1 caches are fast and even if compilers do register allocation they kinda rely on it being not-too-shitty so when spilling (and many compilers for higher level languages doesn't always invest too much time in reg-alloc since they might need to de-opt soon).
I'm curious if this change is an effect of more transistors (more space for a bigger register file) or if they're taking advantage with the microcode translation of the fact that most code doesn't use the SIMD vector registers and re-use unused parts of the register file for these memory aliases.
- wtallis 6y agoI highly doubt the chips are using vacant portions of the SIMD register file to hold scalar values, especially memory addresses. The SIMD registers probably have no easy connection to ports where load/store units ingest addresses.
- Tuna-Fish 6y agoI'd bet dollars to peanuts that the temporaries are stored in the gpr prf. It's big, and it's sized so it's not usually a constraint, so they can just push memory operands in there when there is free space and when it would be useful. And most importantly, unlike the vector registers (or any other structure already in the CPU), it can directly feed the ALUs without any new datapaths.
- Sharlin 6y agogpr prf? General purpose register something register file? Private?
- otherjason 6y agoProbably physical register file as referenced by https://en.wikipedia.org/wiki/Register_file https://en.wikipedia.org/wiki/Register_file. PRF in this context refers to the actual memory that contains all of the register data, which can be much larger than the number of architectural registers to provide for register renaming, which can help performance (basically, the mapping from architectural register names to actual physical registers continually changes so you relieve the bottleneck of waiting for a particular physical register to become available).
- Sharlin 6y agoAh, probably. I thought "private" might also make sense, in that it's an implementation detail hidden behind the architectural register set.
- Tuna-Fish 6y agoPRF = Physical Register File. In modern CPUs, there are no separate architectural registers, all register state is held in a single very large register file (for example, 180 entries in Intel Skylake) that contains all register data, and the architectural register names are pointers into this file. This is different from previous approaches where in-flight register data was held in the ROB and later written back into architectural registers.