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My take on performance using the slides mbrobbel posted, from https://regmedia.co.uk/2020/08/17/ibm_power10_summary.pdf https://regmedia.co.uk/2020/08/17/ibm_po
by fancyfredbot 6y ago
My take on performance using the slides mbrobbel posted, from https://regmedia.co.uk/2020/08/17/ibm_power10_summary.pdf https://regmedia.co.uk/2020/08/17/ibm_power10_summary.pdf
The dual chip module has 30 SMT8 cores running at 3+GHz, capable of 64 FP64 FLOPS/cycle when using the matrix unit. That gives 5.7TF of peak FP64 performance (Compared to 19.5TF on NVIDIA A100 when using tensor cores, and 9.7TF on A100 when not using tensor cores).
They say it has 3x the "general purpose socket performance" of power9 in FP workloads. Trying to make sense of this from the other data, they have 15 SMT8 cores per chip (12 on Power9). The single chip module runs at "4+"GHz and dual chip at "3+"Ghz. (4GHz on Power9). Each SMT8 core has 30% additional performance compared to Power9 (slide 13). If I assume the lowest possible clock that gets me to 2.4x comparing the dual chip modules to the previous single chip modules, whereas assuming 3.75GHz clocks would give 3x.