2 ms·
> it might still linger in the store buffer, which sits between the execution unit and the cache. You're confusing ARM-specific component labels with general-p
by a1369209993 6y ago
> it might still linger in the store buffer, which sits between the execution unit and the cache.
You're confusing ARM-specific component labels with general-purpose technical terminology; the store buffer is a cache, and > you're no longer guaranteed that [its] changes propagate unasked.
- rrss 6y ago'adwn meant only that the store may transiently linger in the store buffer, not that it will remain in the store buffer indefinitely. Barriers (including load-acquire and store-release) don't make the store buffer start draining or drain faster or something - the store buffer is always draining.
- a1369209993 6y ago> the store buffer is always draining. That sounds quite resonable, but it doesn't mean the store buffer isn't part of the cache hierarchy (in the non-ARM-specific-terminology sense), and it's also not what they said. > You need [memory consistency operations] [...] because [a write operation] might still linger in the store buffer