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Difficult problem! If you don't care about compiler performance, auto-generating a compiler backend from scratch is already highly non-trivial. Sail's constrai
by GregarianChild 6y ago
Difficult problem!
If you don't care about compiler
performance, auto-generating a compiler backend from scratch is
already highly non-trivial. Sail's constrained nature may help a
little but not that much, as you essentially need to auto-understand
an interpreter for a Turing-complete language. If you do want
performance, the problem becomes much harder still. One of the biggest
problems in compiler performance is the memory model: what reordering
is permitted, what is prohibited to the optimiser? Sail does not address this. Instead, (like all similar
languages) it 'handles' main memory access by two uninterpreted functions which are
(roughly) "memory read" and "memory write" That's a polite way of
saying: Sail (like all similar languages) leaves this particular problem to the user.
There are open research questions here.
- R0b0t1 6y agoIf you get the compiler backend generated then that same description language could also provide optimization hints. If you look at the RISC-V spec a lot is left up to the implementation but certain optimizations leave e.g. instructions available for cache management and this would have to be exposed in the ISA description. Save Intel's compiler, do any rely on implementation details? They rely on cache and fetch details, but only in broad, nebulous ways that seem very portable. There may be open research questions but it seems to me the biggest thing is paying someone to do it.
- wizzwizz4 6y ago> highly non-trivial I think you a word while reading.