2 ms·

Can you write about how they did IO then? For example, was there ESD protection? I’d be interested in a compare and contrast to a MOSIS or UoU IO PAD cell. h

by egsmi 6y ago

Can you write about how they did IO then? For example, was there ESD protection? I’d be interested in a compare and contrast to a MOSIS or UoU IO PAD cell. http://pages.hmc.edu/harris/cmosvlsi/4e/lect/lect23.pdf http://pages.hmc.edu/harris/cmosvlsi/4e/lect/lect23.pdf Oh ya, love the articles! It’s very interesting to compare an older successful design to more modern techniques. P.S. Are there multiple clock domains in a 8086? If you could find a clock synchronizer or a level shifter that would be very interesting too. P.P.S. Did you find any DFT features? Was DFT even a thing in the 70s?

kens 6y ago
The I/O pins have a resistor and diode to ground as protection. I didn't see any diodes to VCC. The outputs use a chain of successively-larger transistors like modern output cells, to get from the tiny internal current to the large external current. The pins have a variety of implementations, depending on if they are tri-state, input only, output only, bidirectional, and other factors. The 8086 has a two-phase clock. It's all one clock domain. The asynchronous input pins (I think reset and interrupt) have clocked latches to synchronize them. What's DFT?
- egsmi 6y ago
  DFT = Design For Test https://en.m.wikipedia.org/wiki/Design_for_testing https://en.m.wikipedia.org/wiki/Design_for_testing They have a resistor to ground in parallel with the buffer? I get the diode but I can only assume the resistor is a weak pull to prevent charge building up at the pin. But it seems the diode would mostly do that job, to the point of preventing damage anyway. I guess they weren’t concerned with leakage power then. Protection resistors in series with the buffer are fairly common these days. Especially on GPIO type pins.
  - kens 6y ago
    The resistor is on series. I.e pin - resistor - diode to ground and circuitry. The resistor is just some silicon, probably around 30 ohms.
    - egsmi 6y ago
      That makes sense. That’s the current limiting resistor. It protects the protection. See page 12 of this deck. http://www.eng.biu.ac.il/temanad/files/2017/02/Lecture-9-IO.pdf http://www.eng.biu.ac.il/temanad/files/2017/02/Lecture-9-IO....

by egsmi 6y ago

kens 6y ago

The I/O pins have a resistor and diode to ground as protection. I didn't see any diodes to VCC. The outputs use a chain of successively-larger transistors like modern output cells, to get from the tiny internal current to the large external current. The pins have a variety of implementations, depending on if they are tri-state, input only, output only, bidirectional, and other factors. The 8086 has a two-phase clock. It's all one clock domain. The asynchronous input pins (I think reset and interrupt) have clocked latches to synchronize them. What's DFT?

egsmi 6y ago
DFT = Design For Test https://en.m.wikipedia.org/wiki/Design_for_testing https://en.m.wikipedia.org/wiki/Design_for_testing They have a resistor to ground in parallel with the buffer? I get the diode but I can only assume the resistor is a weak pull to prevent charge building up at the pin. But it seems the diode would mostly do that job, to the point of preventing damage anyway. I guess they weren’t concerned with leakage power then. Protection resistors in series with the buffer are fairly common these days. Especially on GPIO type pins.
- kens 6y ago
  The resistor is on series. I.e pin - resistor - diode to ground and circuitry. The resistor is just some silicon, probably around 30 ohms.
  - egsmi 6y ago
    That makes sense. That’s the current limiting resistor. It protects the protection. See page 12 of this deck. http://www.eng.biu.ac.il/temanad/files/2017/02/Lecture-9-IO.pdf http://www.eng.biu.ac.il/temanad/files/2017/02/Lecture-9-IO....