Disclaimer: not an FPGA expert I think really any task can benefit from being ported to FGPA, but FPGA clocks tend to be slower than CPU clocks and large logic

Disclaimer: not an FPGA expert I think really any task can benefit from being ported to FGPA, but FPGA clocks tend to be slower than CPU clocks and large logic will force you to lower the clock as components become more spread out on the chip (assuming all the logic elements needed even fit on your board). The caveat is that it's expensive to do things in hardware, and some things are already designed very well -- if you need to design a whole CPU from scratch on an FPGA to run your code it'll obviously be slower, but it will also take way too much time to get it anywhere near real world performance per clock. Since TCP/IP and SSL are mostly pretty specialized, the answer is yes. If you're interested, there's some open-source projects that do part of this https://github.com/fpgasystems/fpga-network-stack https://github.com/fpgasystems/fpga-network-stack)