I was thinking of writing about the clock. The circuitry to generate the two-phase clock from the single phase input clock is a bit interesting. There are multi

I was thinking of writing about the clock. The circuitry to generate the two-phase clock from the single phase input clock is a bit interesting. There are multiple stages of large transistors to produce the high-current internal clock with two disjoint phases. The clock distribution itself doesn't seem to have any weird tricks, just the two clock lines that wind around the chip. I don't see any optimizations to equalize length to different parts of the chip, for instance.