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Well, supposedly[0] the next iteration of the CM will be based on the Pi 4 guts, and expose the PCIe capabilities. The maker of the hardware being discussed als
by cricalix 6y ago
Well, supposedly[0] the next iteration of the CM will be based on the Pi 4 guts, and expose the PCIe capabilities. The maker of the hardware being discussed also mentions that they might try the compute module (it probably makes a lot of sense from the custom PCB side of life?).
0: https://www.tomshardware.com/news/raspberry-pi-nvme-support-coming https://www.tomshardware.com/news/raspberry-pi-nvme-support-...
- mschuster91 6y agoOh finally. That's good news especially for people who'd like to tinker with advanced stuff requiring PCI-E chipsets who don't really have the nerve to risk wrecking a hundreds of dollars worth of x86 mainboard/CPU...
- p0llard 6y ago> tinker with advanced stuff requiring PCI-E chipsets What sort of things are you talking about here, out of interest? The only way you're going to wreck hardware is if you're attaching something completely incompatible at the physical level (wrong levels, shorts, etc.); if you're "tinkering" you almost certainly don't have the resources to bring up your own PCIe PHY (there's pretty much no way to do this without custom silicon) so presumably you have some preexisting hardware in mind? If you just want to play around at the TLP level (for example by using the hard PCIe core in a cheap Xilinx Series-7 chip) then this is all pretty safe: (temporary) catastrophic system instability is one thing (I learned this the hard way when I accidentally had my FPGA spamming MSIs every free cycle), but real hardware damage is pretty tricky.
- dfox 6y agoGamers and crypto miners do various nasty things to PCIe cards in order to use cheapest cable possible to extend it and actual hardware damage resulting from that seems pretty minimal.
- p0llard 6y agoWhen I said "incompatible at the physical level" I meant it in the OSI sense of an issue at physical protocol level. An electrical specification mismatch could easily cause hardware damage (but would be very hard to achieve unless you were using your own PHY or literally connecting a power supply to the PCIe lines). > seems pretty minimal Is there actually any at all? I can't really see how this could lead to any damage.
- akhilcacharya 6y agoA Pi4 with 4/8 GB of RAM and NVMe SSD would be a pretty solid general purpose computer honestly!