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"TLB entries need to be faulted in?" You mean TLB entries which map kernel pages? Typically kernel pages (and the TLB entries which cover them) are "pinned." Y
by dhess 18y ago
"TLB entries need to be faulted in?" You mean TLB entries which map kernel pages?
Typically kernel pages (and the TLB entries which cover them) are "pinned." You don't want to take a TLB exception in the middle of an interrupt service routine, let alone a page fault. Most architectures couldn't even handle the nested exception, and would panic.
- tptacek 18y agoTLB misses don't cause exceptions on X86. The TLB is part of the microarchitecture.
- dhess 18y agoYeah, also on IA-64 (optionally). I was generalizing. Still, on IA-64 at least, you would typically pin kernel mappings by putting them in translation registers instead of translation cache registers (i.e., the TLB). I haven't kept up with x86 on Linux; does Linux enable the global page extensions? I would assume it does for kernel mappings.