4 ms·
A12Z is still using ARM 8.3 instruction set, therefore no 2048-bit SVE2 for math. Their L1 cache is also 2x smaller than on Zen 2 - that gives them a massive po
by bitL 6y ago
A12Z is still using ARM 8.3 instruction set, therefore no 2048-bit SVE2 for math. Their L1 cache is also 2x smaller than on Zen 2 - that gives them a massive power advantage. I'd wait out this generation of ARM-based notebooks and go with their next CPU that should have SVE2 implemented.
It's not like anything faster than Pentium J is needed for Office, browsing or even front-end development, so in that segment their first gen should be good enough and maybe even better than i3/i5.
- floatboth 6y agoSVE is a niche HPC thing just like AVX512. For most applications NEON (aka AdvSIMD) is more than enough.
- deleted 6y ago[deleted]
- jki275 6y agoAgreed, but the A12Z is an iPad processor. It's not likely to be what they're releasing as a laptop processor.
- GeekyBear 6y agoThe new Apple Silicon laptop chips will be based on the same core used in the A14, not the one in the A12. Rumors have pegged the entry level laptop chip at 8 big cores and 4 little cores. However, it will be interesting to see if that A14 big core implements the ARMv9 instruction set, which is said to be imminent. Apple did implement the ARMv8 instruction set much earlier than it's competitors, so there is a bit of a history there. ARM teased new features like an up to 2048 bit SIMD implementation with SVE2 and Transactional Memory for the ARMv9 instruction set back in early 2019, but has mostly been quiet. https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/new-technologies-for-the-arm-a-profile-architecture https://community.arm.com/developer/ip-products/processors/b...