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Author here. The PLA in both the C64 and the C128 are primarily used to generate chip select signals for the chips that are connected on the system buses. On t
by herio 6y ago
Author here. The PLA in both the C64 and the C128 are primarily used to generate chip select signals for the chips that are connected on the system buses.
On the C128 it is also involved in the DRAM refresh handling.
The C64 PLA was originally a programmable device, the Signetics 82S100. Later version were MOS/CSG copies of the same device but programmed with changes to the manufacturing masks instead, similar to the difference between an EPROM and a Mask ROM.
For a lot more detail and background, I can recommend reading Thomas Giesels excellent paper on the C64 PLA, found at http://skoe.de/docs/c64-dissected/pla/c64_pla_dissected_a4ds.pdf http://skoe.de/docs/c64-dissected/pla/c64_pla_dissected_a4ds...
- rwmj 6y agoWhy did they design a PLA and then use it like this rather than going a bit further and designing an ASIC? I guess because MOS sold the same PLA to other people?
- herio 6y agoThe C128 PLA chip is in essence an ASIC. It's using a PLA design but it's only programmable during the mask creation. Using a PLA logic array is just a very efficient way of achieving the design that they wanted. I don't think they sold them to other companies, MOS was at this stage fully part of Commodore. Commodore was really big on vertical integration, they didn't like buying components from other companies if they could help it. They even manufactured a few 74xx logic chips sometimes used in their 8-bit computers.
- segfaultbuserr 6y agoIt is an ASIC. > A gate array is an approach to the design and manufacture of application-specific integrated circuits (ASICs) using a prefabricated chip with components that are later interconnected into logic devices (e.g. NAND gates, flip-flops, etc.) according to a custom order by adding metal interconnect layers in the factory. https://en.wikipedia.org/wiki/Gate_array https://en.wikipedia.org/wiki/Gate_array PLA's job is simple: it basically contains a lot of combinational logic, transforming some inputs to some outputs. It generates a CS output based on a memory address and bus signals, it's just an address decoder, you can build the decoder using a large number of logic gates, but it gets messy and expensive. You can build a full-custom ASIC for it, but it's expensive and unnecessary. The point of PLA is allowing one to create a custom logic circuit to replace combinational logic by burning the logic on a general template, it was the right tool for the job. Even today, modern equivalents of PLAs are still used. Some companies provide FPGA-to-ASIC conversion service using mask-programmable array, it allows you to burn your FPGA design to the silicon for a moderate performance boost, without the complication of ASIC redesign.