> The f32 registers are already hooked up to i32 ALUs. Technically they are. Practically many CPUs, especially older one, have non-trivial latency cost for pas

> The f32 registers are already hooked up to i32 ALUs. Technically they are. Practically many CPUs, especially older one, have non-trivial latency cost for passing a value between FP and integer ALUs, like couple of cycles each direction. Ever wondered why there're 3 sets of bitwise instructions, e.g. pandn, andnps, andnpd which do exactly same thing with the bits in these registers? Now you know.