> Most implementations of transactional memory are based on software. The POWER9 processor-based systems provide a hardware-based implementation of transactiona

> Most implementations of transactional memory are based on software. The POWER9 processor-based systems provide a hardware-based implementation of transactional memory that is more efficient than the software implementations and requires no interaction with the processor core, therefore enabling the system to operate at maximum performance. Wow. You'd need a compiler that supports this feature (I think I read that GCC 4.7 has experimental support). This would support their traditional customer base - banks and other firms that want atomic operations at speed. There's probably some limitations around transactions across nodes, since you'd be leaving the chassis.