I was working on that around 2015 if I remember well. Some time after Xilinx was unifying their development tools into Vivado. The project attempted to use Zynq

I was working on that around 2015 if I remember well. Some time after Xilinx was unifying their development tools into Vivado. The project attempted to use Zynq SoC, joint software and hardware development on the FPGA in HDL and on the embedded CPU in C. Not exactly trivial things to do but the scope was very small for a first go. We found zero documentation whatsoever on the internet. None of the things you linked to existed. Looks like it took 5 years for some tutorials to be written, and it's not even from Xilinx, it's from some guy sharing on GitHub (maybe a university). Interns were not to blame, more experienced engineers couldn't figure a thing and there was a 3 months deadline. If it were not for one employee who tried the Zynq platform 6 months before and was trained by Xilinx, the whole thing would surely have been canned. There was lots of issues with the platform and the IDE once got a hello world working (I really hope Xilinx fixed most of them). Basic APIs were not working or were documented wrong, the compiler had issues (modified gcc under a modified eclipse), the IDE occasionally crashed or got stuck (it called a ton of sub processes that got lost or failed). The SoC IO pins were undocumented (needed info and identifier to do the routing), had to get private doc from Xilinx and they had typo in their pin layouts, so there was a constant risk to misconfigure a pin and fry the board (FPGA don't forgive mixing up input and output and voltage). Now that I remember about it. The whole thing was pretty insane. ^^ My only question if I had to work on this again would be, does vivado support Git/SVN nowadays?