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Vivado. It's for FPGA design, and I while do ASIC design, but I use vivado to visualise my RTL structure. I find it better than any of the major EDA vendors RTL

Vivado. It's for FPGA design, and I while do ASIC design, but I use vivado to visualise my RTL structure. I find it better than any of the major EDA vendors RTL schematic viewers (except perhaps starvision). I know people rag on Vivado for other reasons, but it's visualisation is fantastic!

tsss 6y ago
I had to use Vivado once and it was the most miserable experience I ever had with a development environment. Even Haskell has better IDE support. Vivado is super unintuitive, it's slow as fuck, it has none of the basic editing features modern IDEs sport and it has very heavy handed enterprise DRM like you would normally find on CAD tools.
- tails4e 6y ago
  I hear this a lot, but I really don't get it. The ide is very responsive, when you are interacting with a design, exploring structure or connectivity, static timing analysis, etc.. Perhaps you are referring to synthesising RTL - yes thst is slow, but thats much slower with ASIC tools. Synthesis and PnR is a very cpu intensive task, and is separate from the GUI really. I'd be interested in hearing the specifics of what you found slow.
  - user5994461 6y ago
    I have to join the other commenters. Vivado is maybe the worst IDE I have used. We had new projects and interns stuck for weeks because they couldn't figure out how to make a hello world project in Vivado (blink a led for a FPGA dev kit). There was zero doc and zero help available online because it's too niche. This was only unstuck after a while when one senior guy showed how to use it and wrote an internal 50 pages docs on how to create a project and do anything at all. Every single step is an impossible to figure out wonder. After the initial hiccups, the IDE and the SoC SDK were abysmal. Couldn't store the software in source control because Vivado had no source control support and it was autogenerating/overwriting garbage files all over the place. To be fair the tool was functional for routing and HDL development. It's usable professionally if you have time to learn and get trained. This may even be good by some embedded development standards (embedded consistently has really shitty development tools that other developers would never tolerate).
    - tails4e 6y ago
      Theres loads of docs and step by step tutorials [0] is just one such free set of material with all files, with step by step PDFs and presentations to explain basic digital design concepts. This is just one form this larger list of courses [1], all free. There are also loads of videos showing how the GUI works [2] [0] https://github.com/xupgit/FPGA-Design-Flow-using-Vivado/tree/master/slides https://github.com/xupgit/FPGA-Design-Flow-using-Vivado/tree... [1] https://www.xilinx.com/support/university.html https://www.xilinx.com/support/university.html [2] https://www.xilinx.com/video/hardware/getting-started-with-the-vivado-ide.html https://www.xilinx.com/video/hardware/getting-started-with-t... Hello World blink an LED can be done in 10 mins flat, I'm afraid you did your intern a disservice by not giving him or her a basic intro and pointer to the docs. Do a goole search for vivado design flow and you'll see all those links I just posted. I lecture in digital design at my local university part time, and I use Vivado and in one lab students are already able to blink the LED, and much more. I do agree the SDK side is a bit dodgy. My biggest bugbear there is project corruption partly due to being eclipse based. I understand thats been upgraded to Vitis now, but have not used that yet. Vivado is separate from that and is very sold though
      - user5994461 6y ago
        I was working on that around 2015 if I remember well. Some time after Xilinx was unifying their development tools into Vivado. The project attempted to use Zynq SoC, joint software and hardware development on the FPGA in HDL and on the embedded CPU in C. Not exactly trivial things to do but the scope was very small for a first go. We found zero documentation whatsoever on the internet. None of the things you linked to existed. Looks like it took 5 years for some tutorials to be written, and it's not even from Xilinx, it's from some guy sharing on GitHub (maybe a university). Interns were not to blame, more experienced engineers couldn't figure a thing and there was a 3 months deadline. If it were not for one employee who tried the Zynq platform 6 months before and was trained by Xilinx, the whole thing would surely have been canned. There was lots of issues with the platform and the IDE once got a hello world working (I really hope Xilinx fixed most of them). Basic APIs were not working or were documented wrong, the compiler had issues (modified gcc under a modified eclipse), the IDE occasionally crashed or got stuck (it called a ton of sub processes that got lost or failed). The SoC IO pins were undocumented (needed info and identifier to do the routing), had to get private doc from Xilinx and they had typo in their pin layouts, so there was a constant risk to misconfigure a pin and fry the board (FPGA don't forgive mixing up input and output and voltage). Now that I remember about it. The whole thing was pretty insane. ^^ My only question if I had to work on this again would be, does vivado support Git/SVN nowadays?

tsss 6y ago

I had to use Vivado once and it was the most miserable experience I ever had with a development environment. Even Haskell has better IDE support. Vivado is super unintuitive, it's slow as fuck, it has none of the basic editing features modern IDEs sport and it has very heavy handed enterprise DRM like you would normally find on CAD tools.

tails4e 6y ago
I hear this a lot, but I really don't get it. The ide is very responsive, when you are interacting with a design, exploring structure or connectivity, static timing analysis, etc.. Perhaps you are referring to synthesising RTL - yes thst is slow, but thats much slower with ASIC tools. Synthesis and PnR is a very cpu intensive task, and is separate from the GUI really. I'd be interested in hearing the specifics of what you found slow.
- user5994461 6y ago
  I have to join the other commenters. Vivado is maybe the worst IDE I have used. We had new projects and interns stuck for weeks because they couldn't figure out how to make a hello world project in Vivado (blink a led for a FPGA dev kit). There was zero doc and zero help available online because it's too niche. This was only unstuck after a while when one senior guy showed how to use it and wrote an internal 50 pages docs on how to create a project and do anything at all. Every single step is an impossible to figure out wonder. After the initial hiccups, the IDE and the SoC SDK were abysmal. Couldn't store the software in source control because Vivado had no source control support and it was autogenerating/overwriting garbage files all over the place. To be fair the tool was functional for routing and HDL development. It's usable professionally if you have time to learn and get trained. This may even be good by some embedded development standards (embedded consistently has really shitty development tools that other developers would never tolerate).
  - tails4e 6y ago
    Theres loads of docs and step by step tutorials [0] is just one such free set of material with all files, with step by step PDFs and presentations to explain basic digital design concepts. This is just one form this larger list of courses [1], all free. There are also loads of videos showing how the GUI works [2] [0] https://github.com/xupgit/FPGA-Design-Flow-using-Vivado/tree/master/slides https://github.com/xupgit/FPGA-Design-Flow-using-Vivado/tree... [1] https://www.xilinx.com/support/university.html https://www.xilinx.com/support/university.html [2] https://www.xilinx.com/video/hardware/getting-started-with-the-vivado-ide.html https://www.xilinx.com/video/hardware/getting-started-with-t... Hello World blink an LED can be done in 10 mins flat, I'm afraid you did your intern a disservice by not giving him or her a basic intro and pointer to the docs. Do a goole search for vivado design flow and you'll see all those links I just posted. I lecture in digital design at my local university part time, and I use Vivado and in one lab students are already able to blink the LED, and much more. I do agree the SDK side is a bit dodgy. My biggest bugbear there is project corruption partly due to being eclipse based. I understand thats been upgraded to Vitis now, but have not used that yet. Vivado is separate from that and is very sold though
    - user5994461 6y ago
      I was working on that around 2015 if I remember well. Some time after Xilinx was unifying their development tools into Vivado. The project attempted to use Zynq SoC, joint software and hardware development on the FPGA in HDL and on the embedded CPU in C. Not exactly trivial things to do but the scope was very small for a first go. We found zero documentation whatsoever on the internet. None of the things you linked to existed. Looks like it took 5 years for some tutorials to be written, and it's not even from Xilinx, it's from some guy sharing on GitHub (maybe a university). Interns were not to blame, more experienced engineers couldn't figure a thing and there was a 3 months deadline. If it were not for one employee who tried the Zynq platform 6 months before and was trained by Xilinx, the whole thing would surely have been canned. There was lots of issues with the platform and the IDE once got a hello world working (I really hope Xilinx fixed most of them). Basic APIs were not working or were documented wrong, the compiler had issues (modified gcc under a modified eclipse), the IDE occasionally crashed or got stuck (it called a ton of sub processes that got lost or failed). The SoC IO pins were undocumented (needed info and identifier to do the routing), had to get private doc from Xilinx and they had typo in their pin layouts, so there was a constant risk to misconfigure a pin and fry the board (FPGA don't forgive mixing up input and output and voltage). Now that I remember about it. The whole thing was pretty insane. ^^ My only question if I had to work on this again would be, does vivado support Git/SVN nowadays?