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Do you think it would be possible to have hardware acceleration for JIT compilation that could beat a pure software JIT (ignoring special purpose domains like r
by GregarianChild 6y ago
Do you think it would be possible to have hardware acceleration
for JIT compilation that could beat a pure software JIT (ignoring special purpose domains like real-time)? If so, how?
- buildbot 6y agoI don’t see any reason why you couldn’t code a JIT to run on an FPGA, though it might not be faster than 3ghz of the excellent branch prediction/Instruction level parallelism in a modern x86 processor.
- GregarianChild 6y agoFaster has two important dimensions in JIT compilers: faster compilation and (more important): faster resulting executables. Both are related, in that the quality of optimisation is traded-off against how long the optimiser can run.
- jecel 6y agohttps://riscv.org/wp-content/uploads/2017/05/Wed1545-HybridDBT-Rokicki.pdf https://riscv.org/wp-content/uploads/2017/05/Wed1545-HybridD... This presentation uses a NIOS II processor to translate RISC-V instructions to a VLIW. Then it replaces the three most time critical parts of the software with hardware blocks.