Gate level emulation is really, really slow. If you've got a nice abstraction like the x86 ISA you can simulate a chip at that level far faster but if you're i

Gate level emulation is really, really slow. If you've got a nice abstraction like the x86 ISA you can simulate a chip at that level far faster but if you're interested in the net level design rather than the abstraction emulation will be way, way slower. At least in throughput, it takes a long time to fab a chip and so you really ought to do emulation first in any event. And for gate/line level effects things get slower still. Back when I was doing my master's thesis I was running simulations over the weekend on sequences of 100s of instructions in SPICE.