We (University of Cambridge) have added it to MIPS and RISC-V. As the same team did both of these they feel similar. Arm is working closely with us to add it to

We (University of Cambridge) have added it to MIPS and RISC-V. As the same team did both of these they feel similar. Arm is working closely with us to add it to their architecture, but it has a few differences, mostly to allow for experimentation to see what should be added to the future production architecture.