It depends. If EUs are actually the bottleneck then doing SSE or AVX wouldn't have any different in speed in such case. However, when instruction decode/retire

It depends. If EUs are actually the bottleneck then doing SSE or AVX wouldn't have any different in speed in such case. However, when instruction decode/retire is the bottleneck, AVX can be faster. I remembered this can be the case on Intel Sandy Bridge (first-gen AVX, double pumped, retire 3 instructions/cycle), where AVX can sometimes be faster (usually it's not that different) With recent CPUs from both Intel/AMD able to at decode/retire at least 4 instructions per cycle this really cease to be the case.