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Don’t most CPUs have 64 byte cache lines anyway?
by legulere 6y ago
Don’t most CPUs have 64 byte cache lines anyway?
- loeg 6y agoAll AMD64 anyway.
- karmakaze 6y agoIt's not only about the smallest unit but every cache level unit size. Imagine if the packed structure was on SSD and mapped to linear memory addresses. Certainly at the smallest scale the cache line is what matters. But there's also benefits of having likely to be accessed data be contiguous at other scales, e.g. os memory page, SSD i/o unit.
- stephencanon 6y ago128B is pretty common (especially for outer caches, but even for L1 on some ARM cores), and 32B is not unheard of.
- dragontamer 6y agoI'm fairly certain that DDR4 has 64-byte bursts (64-bit data bus x 8 length bursts per command == 64-bytes per DDR4 operation). I'd expect all modern systems with DDR4 controllers to have 64-byte cache lines or greater. LPDDR4 is a totally different protocol however. Maybe 32-bytes is optimal on cell phones... I don't know much about that.