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I think it can be difficult to appreciate the problem that 'gate all around' transistors solves. For all their "layers" semiconductor devices have been essentia
by ChuckMcM 6y ago
I think it can be difficult to appreciate the problem that 'gate all around' transistors solves. For all their "layers" semiconductor devices have been essentially stuck in 2 dimensions[1] since the beginning of time.
This is the key point (from the article) : One of the key benefits of these GAA transistors is that the transistor can be specifically tailored to the operational requirements.
Basically, in the "way back" times there was exactly one type of transistor characterized for the whole process, so you got to use the "P" version or the "N" version but always the same transistor. This got upgraded a bit when companies figured out how to mix more than two (I've seen up to seven) types of transistors in the mix so that you could have "drive" transistors for I/O, and "internal" transistors (for logic) and "buffer" transistors that would move clock signals further on the chip or with a sharper turn on or turn off characteristic.
If you can create a process where the GAA transistor is parameterized in the process (by which I mean the circuit designer can say "I want this parameter to be X, this other to by Y, and this third parameter to be Z all at frequency Q" for each and every transistor in the part, that is huge. I would guess that conservatively that adds 30% to your scaling efficiency.
Mask tweaks would be harder but at these scales I don't know that anyone is going in and "fixing up" problems with an e-beam on die these days.
Anyway, the result is going to be some pretty amazing parts when this stuff is integrated into the pipeline, especially mixed signal parts (some analog / some digital) because that is an area that can really benefit from a bunch of different transistor sizes.
[1] EDIT: Referring here to device geometry in the X and Y dimensions. While these determine some parameters, typically such transistors were all of a very similar size (back when the process node name like "1 micron" was equated to the transistor feature size, unlike today where its more of a measurement of something such that the fabs can brag about how small it is)
- TheSpiceIsLife 6y agoWhen you said “2 dimensions” I assumed you were referring to the spacial dimensions X,Y. Reading the rest of your comment, it appears you were referring to transistor parameters? Edit: corrected tapographical error to spacial.
- ChuckMcM 6y agoExcellent observation! Yes I was referring to geometric dimensions when I said "2 dimensions" but from a device physics perspective changing those two dimensions also changes the device parameters :-) (in classic CMOS/NMOS processes I have seen it characterized as leakage and voltage threshold) You are correct though it was worded in a confusing way.
- TheSpiceIsLife 6y agoAh, I see. I initially thought you were going to launch in to three dimensional chips. Thanks for clearing that up, makes sense now.