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Why would they design it to require two ASICs AND an FPGA? Couldn't they just have built the FPGA program into the ASICs?
by shawnz 6y ago
Why would they design it to require two ASICs AND an FPGA? Couldn't they just have built the FPGA program into the ASICs?
- craftinator 6y agoOr vice versa...
- Palomides 6y agopure speculation: the FPGA does the PCIe and all necessary data marshaling, which allows a lot of flexibility for updates and bug fixing on the most finicky parts of hardware two ASICs because once you have one manufactured, most of the costs are sunk and per unit it's cheap to stick a second on the board
- tachyonbeam 6y agoYou're probably right. The FPGA is probably the most expensive part of this board by far, and maybe they figured the FPGA and the PCIE bus can handle enough traffic to keep two compression chips busy.
- ComputerGuru 6y agoFPGAs are cheap compared to the initial run costs for comparable custom ASICs, though.
- tyingq 6y agoThe FPGA is also potentially insurance for bugs on the ASIC that aren't economical to fix. Catch the bug and fix it on the way out of the card.
- tverbeure 6y agoMaking an ASIC with pedestrian low speed IOs is easy. Making an ASIC with high speed SERDES IOs that are required for PCIe is hard. Also, AHA has a followup product that doubles the performance by dropping 4 ASICs and 1 FPGA on a board instead of 2 ASICs. So modularity is a factor as well. But I think the first point is very likely the reason.
- rjsw 6y agoMaybe they designed the ASICs for a PCI board and they just have a memory-mapped interface.