> Take for example the A12Z. It has 8MB of L2 (not L3, it's L2!) It's not really that clear cut. You could also argue that the A12Z has 8MB of L3 and 0MB of L2

> Take for example the A12Z. It has 8MB of L2 (not L3, it's L2!) It's not really that clear cut. You could also argue that the A12Z has 8MB of L3 and 0MB of L2. The L2 in the A12Z is shared while the L2 in the Intel CPU is not. Similarly the latency of the A12Z's L2 is a lot higher than the latency of Intel's L2, but also then still lower than Intel's L3. https://images.anandtech.com/doci/13661/A12X-lat.png https://images.anandtech.com/doci/13661/A12X-lat.png & https://images.anandtech.com/doci/14664/ICLlat.png https://images.anandtech.com/doci/14664/ICLlat.png So it's not "traditional" L2 as you're familiar with it, it's more like an L2.5 or something. Although still accurately called L2 as it is the second level of cache, it's just that Apple went with a rather different cache hierarchy & latency structure than Intel did. But it's really not at all accurate to compare the 8MB of L2 on the A12Z to the 2MB of L2 on Ice Lake. Those are very different caches.