Ah ha, thanks for explaining CR INC, that makes sense now. I have only been looking at the diagrams in the patent. The patent does enumerate (col 25 line 15)

Ah ha, thanks for explaining CR INC, that makes sense now. I have only been looking at the diagrams in the patent. The patent does enumerate (col 25 line 15) the TYP values: 0, 1, 4, 5, and 6. (The microcode listings also sometimes use a value of 7 for TYP.) So this would suggest that types 0 [conditional jump] and 1 [ALU operation] use a full 5-bit A field (to set the ALU opcode) while types 4-7 use a different format for the A and B fields. The MSB of TYP would select between the two formats, and this would explain the absence of a type 2 or type 3 instruction.