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The 6502 has a PLA, as do many other early microprocessors such as the 6800, 8080, and Z-80. The PLA is a structured arrangement of logic gates, rather than a m
by kens 6y ago
The 6502 has a PLA, as do many other early microprocessors such as the 6800, 8080, and Z-80. The PLA is a structured arrangement of logic gates, rather than a microcode ROM. But they both have a similar grid-like appearance.
- ajross 6y agoI've always wondered why that is, given the space-constraints that affected the other areas of those parts' architecture. I assume it was just for development speed, given that the array was easier to lay out (and maybe even had some kind of primitive EDA tooling)?
- kens 6y agoA PLA is reasonably space-efficient if you need gates with a fixed set of inputs and outputs. Even the 8008 used one for instruction decoding. In addition to the microcode ROM, the 8086 has several PLAs of various sizes. For instance, one PLA converts the ALU operation into the necessary ALU control lines.
- NortySpock 6y agoIt would also be fast, right? You would only need to worry about transistor switching speed, not decoding microcode... Disclaimer: just a software engineer, I've only ever heard of microcode, never seen it or written it.
- Koshkin 6y agoHere's what I think is an excellent introduction to the subject (although it leaves unclear the distinction, if any, between microcode and PLA): https://people.cs.clemson.edu/~mark/uprog.html https://people.cs.clemson.edu/~mark/uprog.html
- rwmj 6y agoOf course you're the expert here, but isn't this a little nitpicking? The decode logic of the Z80 (from your site[1]) works in much the same way as microcode by stepping through a set of fixed "instructions". [1] http://static.righto.com/images/z80/z80_labeled_bus_addr.png http://static.righto.com/images/z80/z80_labeled_bus_addr.png
- kens 6y agoThe Z-80 has an interesting way of executing instructions, but it's different from microcode. The first step is the PLA, which basically pattern-matches instructions into related categories, e.g. generating a signal for bit pattern 01XX100X, which might be instructions that read a value from the accumulator for instance. There are two ways this is different from microcode. First, one instruction can trigger multiple "categories". Second, time is not an input here, so there is no stepping through operations. The next part of the Z-80 instruction decoding is a big pile of AND-OR gates that generate the control signals based on the PLA outputs and the timing signals. For example, a gate might trigger the read-from-A-register signal for PLA-output-1 and time-1 or PLA-output-3 and time-1 or PLA output-1 and time-4. (These gates are all complex and were hand-drawn.) The point of this is that both microcode and discrete logic generate particular control signals based on the instruction and time step, but they use very different ways to do this. With microcode, you can point to each micro-instruction as it executed, but in the Z-80, things are happening all over the place seemingly randomly.
- pwg 6y ago> Of course you're the expert here, but isn't this a little nitpicking? No, a PLA [1] and a microcode ROM are two very different animals. A PLA is a way of compactly specifying combinatorial logic circuits (arrangements of and/or/etc. gates) and in the form that gave it the name, it is end user programmable (the P stands for Programmable). But at its heart, a PLA is just a big arrangement of logic gates. A signal goes in, and after the necessary gate delays settle, the result signal comes out. Microcode is literally a "program" and is 'executed' in the same way that all other programs are executed, one instruction at a time, addressed by a program counter. There are also often branching instructions that generate new program counter values to use to sequence through the various steps. None of which exists in a PLA. The appearance of similarity arises because both look similar in a silicon die photo (rows and columns of transistors), but they are very different and perform quite different functions on the chip. [1] https://en.wikipedia.org/wiki/Programmable_logic_array https://en.wikipedia.org/wiki/Programmable_logic_array