The USB issues were related to a critical flaw in the LPC clock, according to the Intel errata. USB expected lifetime traffic for the affected processors was 5

The USB issues were related to a critical flaw in the LPC clock, according to the Intel errata. USB expected lifetime traffic for the affected processors was 50 TB while active at most 10% of the time. The errata implies lower voltage systems aren't affected. To me that says simple design flaw. Something like overdriving a transistor to get more performance out of it, without realizing what relied on it. That will cause slightly different failure conditions from electromigration. https://cdrdv2.intel.com/v1/dl/getContent/600834 https://cdrdv2.intel.com/v1/dl/getContent/600834 https://www.anandtech.com/show/11110/semi-critical-intel-atom-c2000-flaw-discovered https://www.anandtech.com/show/11110/semi-critical-intel-ato...