4 ms·
Possible but unlikely IMO. For one thing it would be trivial to detect. To be a suitable attack surface it would need to wear out ~>100x faster than the most r
by hwillis 6y ago
Possible but unlikely IMO. For one thing it would be trivial to detect. To be a suitable attack surface it would need to wear out ~>100x faster than the most robust pathways (months instead of years). I am spectacle that manufacturing allows for that degree of flexibility. I would be more worried about two related issues:
1. If someone figures out how to focus execution that you'd normally assume distributed in a single area. The simplest example would be to write the first line of cache over and over again; that kind of thing has extensive protection but the principle is reasonable. I'm not sure what you'd use for this.
2. Aging related issues can be worked around; if a subunit loses performance you can give it more time to settle and reorder the pipeline around it. That would open up entirely new classes of timing attacks. You run a quick scan of every combination of execution paths (to find the biggest overlap of underperforming transistors) and you'll be able to make attacks using any number of extremely hard to predict timing combinations.