The whole thing was already incredibly complex: getting the x86 semantics and state right, generating perfectly scheduled P95 code that had the the most useful

The whole thing was already incredibly complex: getting the x86 semantics and state right, generating perfectly scheduled P95 code that had the the most useful speculation - while avoiding known hazards in the hardware, etc. Using a speculative superscalar OoO would migrate part of the complexity from software to hardware. The major concern cited is usually power, but I don't know how much the renamer + scheduler would add relative to everything else; the hardware already had all the rest: extensive speculation support, branch predictors, large register file, store buffers, etc. It's a fascinating topic and this isn't the ideal forum. However my point is this: there are very few companies out that that tries something truly new, and when one does and fail in the market there too much "told you so" going around.