2 ms·
> a set of registers that cache the top of the stack and is as fast as the other registers I could have sworn I'd read something like this - the 'top' words of
by MaxBarraclough 6y ago
> a set of registers that cache the top of the stack and is as fast as the other registers
I could have sworn I'd read something like this - the 'top' words of the stack always being kept in a very low-level cache - but I was unable to find a source on it.
- recursivecaveat 6y agoThe (theoretical) MMIX architecture that Knuth books use has a register-stack.
- p_l 6y agoIt's a mechanism from few real-world RISC cpus that was used in MMIX, i.e. register windows which form a stack (RISC cpus otherwise usually didn't have a stack other than by convention). One CPU that used that approach was SPARC, although the difference is that MMIX has variable-length windows.