I'm not an expert in this area, but my understanding is that DRAM and logic processes are very different from each other. If you want both DRAM and logic on the

I'm not an expert in this area, but my understanding is that DRAM and logic processes are very different from each other. If you want both DRAM and logic on the same chip you'll end up with a compromise which isn't that good for either. Which, aside from the programmability issue, is why processor-in-memory (PIM) approaches haven't caught on (yet). Latest generation high end GPU's use HBM2(E?) memory, which is a very wide and fast pipe compared to DDR4 used for "normal" CPU main memory. As for systolic arrays, to some extent the matrix-matrix units in Google TPU's and NVIDIA Tensor Cores are systolic arrays. I suspect we'll see designs go further down that path in the future.