The StoneCutter paper is a bit light on details. Am I right in thinking they are exploiting LLVM's conversion to SSA form, as a natural starting point for trans

The StoneCutter paper is a bit light on details. Am I right in thinking they are exploiting LLVM's conversion to SSA form, as a natural starting point for translation to RTL? It never occurred to me, but SSA might be a good normal form for thinking converting software into hardware. Apart from that, I'm always shocked by the number of intermediate languages the processor design community uses. In this case: StoneCutter -> LLVM-IR -> Chisel -> Scala -> C++/Verilog There should be a lot of friction in these many steps.