4 ms·
I don't know who is downvoting you, but you are 100% correct that the behaviour is backwards compatible. Intel chips have here and there reverted operations to
by reitzensteinm 6y ago
I don't know who is downvoting you, but you are 100% correct that the behaviour is backwards compatible.
Intel chips have here and there reverted operations to microcode, but a Skylake era chip executing MMX instructions in microcode is going to absolutely blow a contemporary chip out of the water. MMX was introduced in Intel processors before out of order execution.
It would surprise me if real world performance of any program had regressed even since Core 2.
- BeeOnRope 6y agoMMX performance actually regressed somewhat between Haswell and Skylake, and Skylake is when the sharing described in this post was introduced and there might be a connection there.
- reitzensteinm 6y agoRight, but I'm saying that the regression in performance doesn't cause a backwards compatibility issue. You've written some MMX code twenty years ago on a P5 Pentium? It's still going to run 50x faster on a modern CPU.