4 ms·

> the 80486 is not a RISC CPU My immediate thought when I saw the title was: "hey that is a CISC CPU, right?". I only get the chance to have the CISC/RISC dial

• haneefmubarak 6y ago
  Hit me up anytime you'd like to have an architecture convo, esp a cisc / RISC discussion. Keybase in profile, but lmk of a different medium would be more palatable.
• als0 6y ago
  Not just price and speed. The original motivation behind RISC was to make a chip that was simple enough to fit all the functionality onto one die. However, chips have been on a single die for many years, so that's no longer an advantage. The actual instruction set design is much less (but still) important these days. There aren't many "pure" RISC designs left because the universal demand for accelerated encryption, decompression, vectorization etc outweigh the ideological need for a pure design. IMHO what's more relevant today is having an instruction set that compilers can fully exploit, rather than having an instruction set that's optimized for human understanding. In other words, it's no longer a decision between complex and simple.
  • lou1306 6y ago
    > There aren't many "pure" RISC designs left True, from the point of view of the "user" (i.e., the compilers). Internally, most CISC machines nowadays are essentially RISC machines with a CISC-to-microcode translator, so you could also say that there aren't many "pure" CISCs left either :)
    • als0 6y ago
      Indeed, with either macro-op and micro-op fusion microarchtecture some of the performance costs are amortised.