4 ms·
I didn't find what clock rate it runs at. It mentions booting linux in 4 seconds, but that is hard to extrapolate into a core clock frequency. 100 MHz? 200 MHz
by tasty_freeze 6y ago
I didn't find what clock rate it runs at. It mentions booting linux in 4 seconds, but that is hard to extrapolate into a core clock frequency.
100 MHz? 200 MHz? higher?
- Narishma 6y agoDoesn't that depend on the FPGA you use?
- tasty_freeze 6y agoOf course, but he article author did build it on a specific system and said the boot speed, so saying that clock rate would have also been a useful data point if the platform is known. Someone using a different FPGA could use rough scaling factor to guesstimate what they might achieve for the platform they have on hand.
- thalain 6y agoAdded this to the article - it's 100 MHz in this design. For some more performance info on Vex in general, see https://github.com/SpinalHDL/VexRiscv https://github.com/SpinalHDL/VexRiscv We've yet to make detailed analyses on the multicore version, but in general I'd say it's pretty decent.
- tverbeure 6y agoI’ve clocked a VexRiscv at 80 MHz on a very old Cyclone II. On a modern FPGA, 300 to 400MHz should be possible, depending on configuration: caches and branch predictors tends to reduce the clock speed. You can find some results here: https://github.com/SpinalHDL/VexRiscv#area-usage-and-maximal-frequency https://github.com/SpinalHDL/VexRiscv#area-usage-and-maximal... None of those numbers are for the fastest FPGAs.