"instead of learning digital design you can use your sw development skills" That is not a claim I've heard from any of these tools. They are all still billed

"instead of learning digital design you can use your sw development skills" That is not a claim I've heard from any of these tools. They are all still billed as hardware description languages, just better HDLs than (System)Verilog or VHDL, which is certainly arguable. What you are referring to with that statement is the snake oil that EDA vendors call High Level Synthesis (HLS). "Just write your algorithm in C and our tool will turn it into gates!"