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I was wondering why it had 6 CPUs (as opposed e.g. to 8). Seems that ALR did some clever engineering to work around a limitation in the chipset which was only

I was wondering why it had 6 CPUs (as opposed e.g. to 8). Seems that ALR did some clever engineering to work around a limitation in the chipset which was only designed for 4. > 6x6 is based on the same 450GX chip set (previously known as Orion) as competitors' four-CPU offerings. The reason everyone else is shipping four-CPU systems is the chip set's 2-bit CPU addressing scheme -- allowing for four-CPU IDs. What ALR has done is implement two sets of three CPUs, where the missing fourth CPU in each set is actually a stand-in for the other entire group. The Pentium Pro's round-robin multitasking approach is preserved, and the four-CPU limit is broken. [1] http://www.sandyflat.net/digerati/gatewayalr9000/infoworld%20review/index.htm http://www.sandyflat.net/digerati/gatewayalr9000/infoworld%2...

dfox 6y ago
Of historical note is that more than 8 socket Opteron servers were implemented in similar way. There was an chip (IIRC called AMD Horus) that contained two HyperTransport/CoherentLink controllers connected back to back.
- p_l 6y ago
  It's a standard approach to making bigger systems, as most built-in cache coherency protocols are optimized for a too-small case. AMD Horus allowed easy build of 8x8 servers, SGI continued their work from Altix in UltraViolet (now owned by HPE?) where they used custom cache coherency chips in between, implementing custom cache directory protocol over NUMAlink connections. Also, the approach of having "router" and "local area switch" is used in Infiniband, where local subnets use 16bit ID for endpoints, and 128bit addresses for inter-subnet routing (the addresses are IPv6 compatible).