5 ms·
Reminds me a lot of the Parallax Propeller: many simple cores optimized for bit-banging I/O and programmable logic. Of course this is much lower power and has m
by mastax 6y ago
Reminds me a lot of the Parallax Propeller: many simple cores optimized for bit-banging I/O and programmable logic. Of course this is much lower power and has many more cores.
I think that many core architectures can actually be simpler to program in an embedded context than the traditional single core systems. It's akin to a hardware implementation of the actor model rather than an interrupt state machine or interrupt event loop. Being able to dedicate cores to single I/O tasks means you can bitbang almost anything. Here's HDMI running in a few lines of code on a Propeller 2 with no external components but the HDMI connector: https://forums.parallax.com/discussion/comment/1475075/#Comment_1475075 https://forums.parallax.com/discussion/comment/1475075/#Comm...
- gautamcgoel 6y agoI bought a propeller 1 as a teenager but never really did much with it... I recall that the propeller 2 is coming out soon, so perhaps it's time to jump back in!
- amock 6y agoWhile it isn't ready for full production volumes you can purchase a Propeller 2 evaluation board right now.
- fortran77 6y agoThe DEFCON 22 badge was done on a Propeller. I did a little pokeing around on it--very interesting architecture. But they don't all run at once.... It's just a way to switch contexts instantly.
- duskwuff 6y agoThey do all run at once. All eight "cogs" exist as discrete hardware within the chip, and can perform operations on their cog RAM and I/Os simultaneously. What doesn't happen all at once is access to main RAM. That's handled by a round-robin arbiter.
- dkersten 6y agoThat’s not what the datasheet says. It says: ”... its eight processors, called cogs, that can perform simultaneous tasks independently or cooperatively...” ” True parallel processing with eight symmetric 32-bit processors (cogs) in one microcontroller” ”20 MIPS per cog, 160 MIPS total with all cogs running” ”All eight cogs are driven from the System Clock; they each maintain the same time reference and all active cogs execute instructions simultaneously.” https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf https://www.parallax.com/sites/default/files/downloads/P8X32... The shared hub memory is only accessible to one core at once and which one has access is switched between in round robin fashion, each core getting a turn to access it once every 16 clock cycles. Perhaps that’s what you were thinking of?
- fortran77 6y agoYes! Thanks! 8 years ago, it's hard to remember things.
- richard_shelton 6y agoThe chip is closer to AsAP [1] and XMOS xCore [2]. I remember that these two chips-competitors already existed when I was programming the predecessor of Greenarrays GA144. By the way, it was very fun to program these Forth-based processor arrays! [1] https://en.wikipedia.org/wiki/Asynchronous_array_of_simple_processors https://en.wikipedia.org/wiki/Asynchronous_array_of_simple_p... [2] https://en.wikipedia.org/wiki/XMOS https://en.wikipedia.org/wiki/XMOS