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I hate to rag on new stuff, especially in the HDL space where I think it's desperately needed, but the syntax of this language is so foreign that I think it's e

I hate to rag on new stuff, especially in the HDL space where I think it's desperately needed, but the syntax of this language is so foreign that I think it's extremely unlikely you really get a large amount of adoption. We can't even get Verilog 1995 people to switch to 2001, let along SystemVerilog.

naasking 6y ago
Clash needs Verilog and VHDL to Clash translators. Make the translator available online for learning purposes, for small samples. Then you can at least leverge your existing knowledge, see how it translates to the new language, and then a tutorial using this could easily show how it's an improvement, either in expressiveness or safety checking.
gaze 6y ago
I think this works well for people who are interested in both Haskell and hardware design. The syntax is pretty nutty if you're just a hardware designer, but it's ultimately a language embedded in Haskell, so it has the friction of having to be embedded but the benefit of the Haskell ecosystem. I don't think it'll see super wide adoption, but imagine it will have its uses and fans.
- Rochus 6y ago
  > works well for people who are interested in both Haskell and hardware design This intersection is not likely to differ much from the empty set.
  - gaze 6y ago
    Well chisel the language itself is proof otherwise. The existence of chisel, built on scala is also proof otherwise. People get interested in things where there's incentive to learn. Have a little faith.
  - eli_gottlieb 6y ago
    Hello, I'm the empty set.
    - Rochus 6y ago
      Congrats ;-)
danharaj 6y ago
I've seen clash used in production. Old firms aren't going to pick it up but there are upstarts leveraging it.
centimeter 6y ago
> I hate to rag on new stuff Haskell/ML syntax is hardly "new stuff". > I think it's extremely unlikely you really get a large amount of adoption Clash is used to manufacture production hardware by at least one of the top 5 largest companies in the world.
- ancharm 6y ago
  I know it's not new stuff, go look at Bluespec and their open-source HDL. For most hardware designers though, it is new. Most hardware designers are EEs and not CS people. I know many designers that do not even want to learn a programming language like python which has a relatively easy to read syntax. ML/Functional Programming languages require a completely different mindset, just like hardware designing does if you come from programming languages. I think the world is ripe for a new HDL. But the right foundations need to be there. It needs first class support with existing HDLs (VHDL, Verilog/SV). It needs to integrate with all the existing EDA tools in mixed language environments, and be easy to debug. Debugging is a huge problem in the "new HDL" space right now. Go look at Chisel. Google used it to design some of if not all of their TPU, but their Verif engineers had a really difficult time with the debug because it compiled to verilog, and then was difficult to reason about. I have so many thoughts on this space and I want to make it better. It would be an absolute dream to develop a new HDL that enabled Hardware designers and Verif engineers to have all the superpowers that SWEs have in today's world. Being both proficient in various programming languages and Verilog/SV/UVM/etc, its so wild to see how big of a gap there is in productivity tools. Essentially SWEs have all the good stuff.
  - Rochus 6y ago
    > I have so many thoughts on this space and I want to make it better Have you written them down somewhere? Would be interested. Are you a HW designer? > It would be an absolute dream to develop a new HDL that enabled Hardware designers and Verif engineers to have all the superpowers that SWEs have in today's world Wasn't that the intention of SystemVerilog?
    - ancharm 6y ago

naasking 6y ago

Clash needs Verilog and VHDL to Clash translators. Make the translator available online for learning purposes, for small samples. Then you can at least leverge your existing knowledge, see how it translates to the new language, and then a tutorial using this could easily show how it's an improvement, either in expressiveness or safety checking.

gaze 6y ago

I think this works well for people who are interested in both Haskell and hardware design. The syntax is pretty nutty if you're just a hardware designer, but it's ultimately a language embedded in Haskell, so it has the friction of having to be embedded but the benefit of the Haskell ecosystem. I don't think it'll see super wide adoption, but imagine it will have its uses and fans.

Rochus 6y ago
> works well for people who are interested in both Haskell and hardware design This intersection is not likely to differ much from the empty set.
- gaze 6y ago
  Well chisel the language itself is proof otherwise. The existence of chisel, built on scala is also proof otherwise. People get interested in things where there's incentive to learn. Have a little faith.
- eli_gottlieb 6y ago
  Hello, I'm the empty set.
  - Rochus 6y ago
    Congrats ;-)

danharaj 6y ago

I've seen clash used in production. Old firms aren't going to pick it up but there are upstarts leveraging it.

centimeter 6y ago

> I hate to rag on new stuff Haskell/ML syntax is hardly "new stuff". > I think it's extremely unlikely you really get a large amount of adoption Clash is used to manufacture production hardware by at least one of the top 5 largest companies in the world.

ancharm 6y ago
I know it's not new stuff, go look at Bluespec and their open-source HDL. For most hardware designers though, it is new. Most hardware designers are EEs and not CS people. I know many designers that do not even want to learn a programming language like python which has a relatively easy to read syntax. ML/Functional Programming languages require a completely different mindset, just like hardware designing does if you come from programming languages. I think the world is ripe for a new HDL. But the right foundations need to be there. It needs first class support with existing HDLs (VHDL, Verilog/SV). It needs to integrate with all the existing EDA tools in mixed language environments, and be easy to debug. Debugging is a huge problem in the "new HDL" space right now. Go look at Chisel. Google used it to design some of if not all of their TPU, but their Verif engineers had a really difficult time with the debug because it compiled to verilog, and then was difficult to reason about. I have so many thoughts on this space and I want to make it better. It would be an absolute dream to develop a new HDL that enabled Hardware designers and Verif engineers to have all the superpowers that SWEs have in today's world. Being both proficient in various programming languages and Verilog/SV/UVM/etc, its so wild to see how big of a gap there is in productivity tools. Essentially SWEs have all the good stuff.
- Rochus 6y ago
  > I have so many thoughts on this space and I want to make it better Have you written them down somewhere? Would be interested. Are you a HW designer? > It would be an absolute dream to develop a new HDL that enabled Hardware designers and Verif engineers to have all the superpowers that SWEs have in today's world Wasn't that the intention of SystemVerilog?
  - ancharm 6y ago