> and it's a quad-socket motherboard Epyc doesn't do quad sockets. Is this just another hypothetical "what if" at this point with no basis in reality? Because

> and it's a quad-socket motherboard Epyc doesn't do quad sockets. Is this just another hypothetical "what if" at this point with no basis in reality? Because sure, a hypothetical non-existent Epyc re-designed to compete in the double precision floating point space favoring memory bandwidth above all else could be really cool. Then again, so could anything else custom designed exclusively for that use case. > but the inter-socket bandwidth would still be whatever it is now, and would be difficult to increase. 64 PCI-E 4.0 lanes form the CPU-CPU interconnect currently. Since we're making up stuff why not assume that's doubled next generation along with being PCI-E 5.0? So that'd be 500GB/s give or take.