4 ms·
The L3 is split per core? I thought it was only typically L1 cache that was per core, with L2 and L3 being shared across the entire die.
by admax88q 7y ago
The L3 is split per core? I thought it was only typically L1 cache that was per core, with L2 and L3 being shared across the entire die.
- gameswithgo 7y agonot per core, but per ccx. a ccx is a group of cores. if you need something that isn't in your ccx's chunk of l3 cache you have to hop through the memory controller and pay a latency penalty.