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I know that we're not voting, but I miss a binary literal very much. I would also like a literal digit separator to improve readability. Verilog Hardware Descri
by OnACoffeeBreak 7y ago
I know that we're not voting, but I miss a binary literal very much. I would also like a literal digit separator to improve readability. Verilog Hardware Description Language does that with an underscore [1]. For example, 0xad_beef to improve readability of a hex literal, and 0b011_1010 to improve readability of a binary literal.
1: http://verilog.renerta.com/mobile/source/vrg00020.htm http://verilog.renerta.com/mobile/source/vrg00020.htm
- jfkebwjsbx 7y agoIf they pick this up, they will likely use C++'s syntax/rules.