4 ms·
Should take Verilog binary construction syntax, like { 12'd12, 16'hffee, 3'b101 } (or something similar that would fit with C's syntax).
by jhallenworld 7y ago
Should take Verilog binary construction syntax, like { 12'd12, 16'hffee, 3'b101 } (or something similar that would fit with C's syntax).
- dirtydroog 7y agoMaybe not.
- jhallenworld 7y agoWhy not? If you have to combine bit fields now, it's a mess of shifting and masking.