Just a random FPGA won't cut it, if you want to simulate a reasonably large processor design. Also, you would only be able to simulate the basic logic for its v

Just a random FPGA won't cut it, if you want to simulate a reasonably large processor design. Also, you would only be able to simulate the basic logic for its validity. But that is only the very first and easiest step in the verification chain. Things start to get more interesting, when you look into the real-world analog properties of you chip. You want to check the correct timing so that the logic still works correctly at high clock speeds - depends very much on the acutal placing of the components, e.g. wire length. Then there is the question of thermal behavior. Long term stability (years of operation). And then we enter the space of manufacturing. You need to optimize your design so that it can be manufactured reliably. There are some systematic variations across the wafer and your design should account for that. There are also a lot of constraints given by the production process, how you have to distribute components on your chip. Getting from an initial logic design to a manufactured chip is a big adventure. This requires a lot of layers of software, a lot of it highly specified. And yes, you can buy very good simulators for chips, just search for Cadence Palladium for example. They are huge monsters.