3 ms·
An even more interesting exercise would be to implement a DDR5 driver circuit for the 1 bit of RAM. Typical DDR5 interfaces take hundreds to thousands lines of
by ampdepolymerase 6y ago
An even more interesting exercise would be to implement a DDR5 driver circuit for the 1 bit of RAM. Typical DDR5 interfaces take hundreds to thousands lines of Verilot/VHDL so quite a few transistors will be needed.
- anticensor 6y agoYou need at least two words of data to have a meaningful DDR...