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They are using the TSMC 7nm process, so they would even have a slight process advantage vs. the best Intel chips. The Itanium never made it beyond 32nm. Trade-o
by _ph_ 7y ago
They are using the TSMC 7nm process, so they would even have a slight process advantage vs. the best Intel chips. The Itanium never made it beyond 32nm. Trade-offs at 7nm might work out quite differently than at 32nm. The latest Itanium chips had 3 billion transistors - that is small compared to the over 8 billion transistors of an iPhone A13 processor. So the "monster" chip Itanium - large and power consuming - would possibly make a decent mobile processor with todays technology.
- jabl 7y agoThe question isn't whether it's going to be better than Itanium. Of course it will (assuming it ever becomes a real product, of course), since it's using a several generations better process. Itanium was never particularly impressive compared to its (roughly) contemporary competitors on the (roughly) same process, why would Tachyon be any better? You say that tradeoffs change as a function of the process. E.g. wires becoming ever more expensive compared to transistors. Is that enough to tilt the playing field in favour of VLIW? I can see VLIW having an advantage here if the VLIW instruction bundle lines up 1:1 with the hardware pipelines (less routing inside the chip), and the workload is static so you can use profile guided optimization to work around the lack of dynamic scheduling (OoO). However, once you try to create a VLIW ISA that maps to several generations and/or high/low end implementations you lose that 1:1 mapping, and for general purpose code compile time scheduling isn't particularly good. As Intel found out.
- ema 7y agoThe Mill architecture uses install time specialization to go from not quite machine code to machine code to maintain the 1:1 mapping with different implementations.